IEEE 可编程芯片测试和验证研讨会

发布时间:2019-03-22 09:16:24

IEEE International Workshop on Testing and Verification of Programmable Chips

(TVPC 2019)

July 22-26 2019.Sofia, Bulgaria
In conjunction with the19th IEEE international Conference on software Quality, Reliability and Security (QRS 2019)
Program Committee Chair
Jacob Abraham, University of Texas at Austin, USA
Organizing Committee Chair 
Jinbo Wang, Technology & Engineering Center for Space Utilization, CAS, China;
Programmable logic is an important achievement in the development of modern computer application technology. Compared with ASIC technology, programmable logic resources can be flexibly customized and reduced, with the advantages of high performance and low power consumption, and low cost and low risk. In the recent years, it has been widely used in high-reliability fields, consumer electronics, Internet of Things, and other intelligent field.
With the increasing complexity and large-scale increase of functions, the test sufficiency and test efficiency of programmable logic are very important, which will directly affect the safety and reliability of products. The International Workshop on Testing and Verification of Programmable Chips (TVPC) aims to provide a forum to bring together researchers, practitioners and experts to present and discuss their relevant results or experience in programmable logic chip verification .And the special emphasis will be put on the intersection of four fields. 
1. Topics of interest 
FPGA/SOPC Testing and Validation 
Accelerated verification and simulation 
Modeling and Model assessment
IP verification
Debugging and Verification Visualization
Timing Analysis and Cross-Clock Domain Analysis 
SOPC Software and hardware co-verification, Coverage analysis, testing methods and test case generation
FPGA/SOPC functional, physical, and comprehensive verification platform
FPGA/SOPC Formal Methods
Formal modeling and Model assessment 
Formal coverage analysis
Property sanity check
SOPC/FPGA Formal verification
Equivalence analysis
FPGA/SOPC Safety and Reliability
Single particle effect and Total dose effect detection and prevention 
SRAM/FLASH/Anti-fuse FPGA safety design 
Safety fault injection and analysis
FPGA/SOPC Information security, side channel attack prevention
Safety and reliability testing methods
New Trend in Testing 
AI and intelligent IC verification
AI toward autonomous testing
Machine learning and its application in testing
Testing in emerging fields, including internet of things and automotive electronics
Functional safety in automotive electronics, ISO 26262
2. Submission
Authors are invited to submit original unpublished research papers as well as industrial practice papers. Detailed instructions for electronic paper submission, panel proposals, and review process can be found at
3. General inquiries
  For more detailed and updated information, please contact Professor Jinbo Wang at
4. Important Dates
May 1, 2019  Submission deadline
May 25, 2019 Author notification
Jun 10, 2019 Camera-ready dues
Jul 22 - 26,2019 Workshop dates